Publication
Efficient Event Processing through Reconfigurable Hardware for Algorithmic Trading
Mohammad Sadoghi / Hans-Arno Jacobsen / Martin Labrecque / Warren Shum / Harsh Singh
Proceedings of the VLDB Endowment, 2010 ยท Journal Article
Abstract
In this demo, we present fpga-ToPSS (Toronto Publish/Subscribe System Family), an efficient event processing platform for high-frequency and low-latency algorithmic trading. Our event processing platform is built over reconfigurable hardware—FPGAs—to achieve line-rate processing. Furthermore, our event processing engine supports Boolean expression matching with an expressive predicate language that models complex financial strategies to autonomously buy and sell stocks based on real-time financial data.